Procházet zdrojové kódy

added just a extender for the 4pin 1mm fpc connector

tags/v0
Benjamin před 3 roky
rodič
revize
dc23aca022
4 změnil soubory, kde provedl 607 přidání a 0 odebrání
  1. +252
    -0
      FPC_4_extender/FPC_4_extender.kicad_pcb
  2. +61
    -0
      FPC_4_extender/FPC_4_extender.net
  3. +248
    -0
      FPC_4_extender/FPC_4_extender.pro
  4. +46
    -0
      FPC_4_extender/FPC_4_extender.sch

+ 252
- 0
FPC_4_extender/FPC_4_extender.kicad_pcb Zobrazit soubor

@@ -0,0 +1,252 @@
(kicad_pcb (version 20171130) (host pcbnew "(5.1.4)-1")

(general
(thickness 1.6)
(drawings 4)
(tracks 8)
(zones 0)
(modules 2)
(nets 5)
)

(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)

(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(via_size 0.8)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.051)
(solder_mask_min_width 0.25)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)

(net 0 "")
(net 1 "Net-(J1-Pad1)")
(net 2 "Net-(J1-Pad2)")
(net 3 "Net-(J1-Pad3)")
(net 4 "Net-(J1-Pad4)")

(net_class Default "Dies ist die voreingestellte Netzklasse."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net "Net-(J1-Pad1)")
(add_net "Net-(J1-Pad2)")
(add_net "Net-(J1-Pad3)")
(add_net "Net-(J1-Pad4)")
)

(module Connector_FFC-FPC:TE_84952-4_1x04-1MP_P1.0mm_Horizontal (layer F.Cu) (tedit 5AEE14E3) (tstamp 6031B0B3)
(at 126.5 37.51 270)
(descr "TE FPC connector, 04 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4")
(tags "te fpc 84952")
(path /60328FBF)
(attr smd)
(fp_text reference J1 (at 4.49 -2 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x04 (at 0 7.7 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.935 -0.8) (end 4.935 -0.8) (layer F.Fab) (width 0.1))
(fp_line (start 4.935 -0.8) (end 4.935 3.71) (layer F.Fab) (width 0.1))
(fp_line (start 4.935 3.71) (end 5.96 3.71) (layer F.Fab) (width 0.1))
(fp_line (start 5.96 3.71) (end 5.96 4.6) (layer F.Fab) (width 0.1))
(fp_line (start 5.96 4.6) (end -5.96 4.6) (layer F.Fab) (width 0.1))
(fp_line (start -5.96 4.6) (end -5.96 3.71) (layer F.Fab) (width 0.1))
(fp_line (start -5.96 3.71) (end -4.935 3.71) (layer F.Fab) (width 0.1))
(fp_line (start -4.935 3.71) (end -4.935 -0.8) (layer F.Fab) (width 0.1))
(fp_line (start -2 -0.8) (end -1.5 0.2) (layer F.Fab) (width 0.1))
(fp_line (start -1.5 0.2) (end -1 -0.8) (layer F.Fab) (width 0.1))
(fp_line (start 4.935 4.6) (end 4.935 5.61) (layer F.Fab) (width 0.1))
(fp_line (start 4.935 5.61) (end 5.96 5.61) (layer F.Fab) (width 0.1))
(fp_line (start 5.96 5.61) (end 5.96 6.5) (layer F.Fab) (width 0.1))
(fp_line (start 5.96 6.5) (end -5.96 6.5) (layer F.Fab) (width 0.1))
(fp_line (start -5.96 6.5) (end -5.96 5.61) (layer F.Fab) (width 0.1))
(fp_line (start -5.96 5.61) (end -4.935 5.61) (layer F.Fab) (width 0.1))
(fp_line (start -4.935 5.61) (end -4.935 4.6) (layer F.Fab) (width 0.1))
(fp_line (start 5.045 3.06) (end 5.045 3.6) (layer F.SilkS) (width 0.12))
(fp_line (start 5.045 3.6) (end 6.07 3.6) (layer F.SilkS) (width 0.12))
(fp_line (start 6.07 3.6) (end 6.07 4.71) (layer F.SilkS) (width 0.12))
(fp_line (start 6.07 4.71) (end -6.07 4.71) (layer F.SilkS) (width 0.12))
(fp_line (start -6.07 4.71) (end -6.07 3.6) (layer F.SilkS) (width 0.12))
(fp_line (start -6.07 3.6) (end -5.045 3.6) (layer F.SilkS) (width 0.12))
(fp_line (start -5.045 3.6) (end -5.045 3.06) (layer F.SilkS) (width 0.12))
(fp_line (start -2.89 -0.91) (end -2.065 -0.91) (layer F.SilkS) (width 0.12))
(fp_line (start -2.065 -0.91) (end -2.065 -2.71) (layer F.SilkS) (width 0.12))
(fp_line (start 2.065 -0.91) (end 2.89 -0.91) (layer F.SilkS) (width 0.12))
(fp_line (start -6.46 -3.3) (end -6.46 7) (layer F.CrtYd) (width 0.05))
(fp_line (start -6.46 7) (end 6.46 7) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.46 7) (end 6.46 -3.3) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.46 -3.3) (end -6.46 -3.3) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 1.9 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 smd rect (at -1.5 -1.8 270) (size 0.61 2) (layers F.Cu F.Paste F.Mask)
(net 1 "Net-(J1-Pad1)"))
(pad 2 smd rect (at -0.5 -1.8 270) (size 0.61 2) (layers F.Cu F.Paste F.Mask)
(net 2 "Net-(J1-Pad2)"))
(pad 3 smd rect (at 0.5 -1.8 270) (size 0.61 2) (layers F.Cu F.Paste F.Mask)
(net 3 "Net-(J1-Pad3)"))
(pad 4 smd rect (at 1.5 -1.8 270) (size 0.61 2) (layers F.Cu F.Paste F.Mask)
(net 4 "Net-(J1-Pad4)"))
(pad MP smd rect (at -4.49 1 270) (size 2.68 3.6) (layers F.Cu F.Paste F.Mask))
(pad MP smd rect (at 4.49 1 270) (size 2.68 3.6) (layers F.Cu F.Paste F.Mask))
(model ${KISYS3DMOD}/Connector_FFC-FPC.3dshapes/TE_84952-4_1x04-1MP_P1.0mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

(module Connector_FFC-FPC:TE_84952-4_1x04-1MP_P1.0mm_Horizontal (layer F.Cu) (tedit 5AEE14E3) (tstamp 6031B0DD)
(at 134 37.5 90)
(descr "TE FPC connector, 04 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4")
(tags "te fpc 84952")
(path /60329B47)
(attr smd)
(fp_text reference J2 (at -4.5 -2 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x04 (at 0 7.7 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 1.9 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 6.46 -3.3) (end -6.46 -3.3) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.46 7) (end 6.46 -3.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -6.46 7) (end 6.46 7) (layer F.CrtYd) (width 0.05))
(fp_line (start -6.46 -3.3) (end -6.46 7) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.065 -0.91) (end 2.89 -0.91) (layer F.SilkS) (width 0.12))
(fp_line (start -2.065 -0.91) (end -2.065 -2.71) (layer F.SilkS) (width 0.12))
(fp_line (start -2.89 -0.91) (end -2.065 -0.91) (layer F.SilkS) (width 0.12))
(fp_line (start -5.045 3.6) (end -5.045 3.06) (layer F.SilkS) (width 0.12))
(fp_line (start -6.07 3.6) (end -5.045 3.6) (layer F.SilkS) (width 0.12))
(fp_line (start -6.07 4.71) (end -6.07 3.6) (layer F.SilkS) (width 0.12))
(fp_line (start 6.07 4.71) (end -6.07 4.71) (layer F.SilkS) (width 0.12))
(fp_line (start 6.07 3.6) (end 6.07 4.71) (layer F.SilkS) (width 0.12))
(fp_line (start 5.045 3.6) (end 6.07 3.6) (layer F.SilkS) (width 0.12))
(fp_line (start 5.045 3.06) (end 5.045 3.6) (layer F.SilkS) (width 0.12))
(fp_line (start -4.935 5.61) (end -4.935 4.6) (layer F.Fab) (width 0.1))
(fp_line (start -5.96 5.61) (end -4.935 5.61) (layer F.Fab) (width 0.1))
(fp_line (start -5.96 6.5) (end -5.96 5.61) (layer F.Fab) (width 0.1))
(fp_line (start 5.96 6.5) (end -5.96 6.5) (layer F.Fab) (width 0.1))
(fp_line (start 5.96 5.61) (end 5.96 6.5) (layer F.Fab) (width 0.1))
(fp_line (start 4.935 5.61) (end 5.96 5.61) (layer F.Fab) (width 0.1))
(fp_line (start 4.935 4.6) (end 4.935 5.61) (layer F.Fab) (width 0.1))
(fp_line (start -1.5 0.2) (end -1 -0.8) (layer F.Fab) (width 0.1))
(fp_line (start -2 -0.8) (end -1.5 0.2) (layer F.Fab) (width 0.1))
(fp_line (start -4.935 3.71) (end -4.935 -0.8) (layer F.Fab) (width 0.1))
(fp_line (start -5.96 3.71) (end -4.935 3.71) (layer F.Fab) (width 0.1))
(fp_line (start -5.96 4.6) (end -5.96 3.71) (layer F.Fab) (width 0.1))
(fp_line (start 5.96 4.6) (end -5.96 4.6) (layer F.Fab) (width 0.1))
(fp_line (start 5.96 3.71) (end 5.96 4.6) (layer F.Fab) (width 0.1))
(fp_line (start 4.935 3.71) (end 5.96 3.71) (layer F.Fab) (width 0.1))
(fp_line (start 4.935 -0.8) (end 4.935 3.71) (layer F.Fab) (width 0.1))
(fp_line (start -4.935 -0.8) (end 4.935 -0.8) (layer F.Fab) (width 0.1))
(pad MP smd rect (at 4.49 1 90) (size 2.68 3.6) (layers F.Cu F.Paste F.Mask))
(pad MP smd rect (at -4.49 1 90) (size 2.68 3.6) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 1.5 -1.8 90) (size 0.61 2) (layers F.Cu F.Paste F.Mask)
(net 1 "Net-(J1-Pad1)"))
(pad 3 smd rect (at 0.5 -1.8 90) (size 0.61 2) (layers F.Cu F.Paste F.Mask)
(net 2 "Net-(J1-Pad2)"))
(pad 2 smd rect (at -0.5 -1.8 90) (size 0.61 2) (layers F.Cu F.Paste F.Mask)
(net 3 "Net-(J1-Pad3)"))
(pad 1 smd rect (at -1.5 -1.8 90) (size 0.61 2) (layers F.Cu F.Paste F.Mask)
(net 4 "Net-(J1-Pad4)"))
(model ${KISYS3DMOD}/Connector_FFC-FPC.3dshapes/TE_84952-4_1x04-1MP_P1.0mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

(gr_line (start 118.5 45) (end 118.5 30) (layer Edge.Cuts) (width 0.05) (tstamp 6031B3EC))
(gr_line (start 142 45) (end 118.5 45) (layer Edge.Cuts) (width 0.05))
(gr_line (start 142 30) (end 142 45) (layer Edge.Cuts) (width 0.05))
(gr_line (start 118.5 30) (end 142 30) (layer Edge.Cuts) (width 0.05))

(segment (start 128.31 36) (end 128.3 36.01) (width 0.25) (layer F.Cu) (net 1))
(segment (start 132.2 36) (end 128.31 36) (width 0.25) (layer F.Cu) (net 1))
(segment (start 132.19 37.01) (end 132.2 37) (width 0.25) (layer F.Cu) (net 2))
(segment (start 128.3 37.01) (end 132.19 37.01) (width 0.25) (layer F.Cu) (net 2))
(segment (start 128.31 38) (end 128.3 38.01) (width 0.25) (layer F.Cu) (net 3))
(segment (start 132.2 38) (end 128.31 38) (width 0.25) (layer F.Cu) (net 3))
(segment (start 132.19 39.01) (end 132.2 39) (width 0.25) (layer F.Cu) (net 4))
(segment (start 128.3 39.01) (end 132.19 39.01) (width 0.25) (layer F.Cu) (net 4))

)

+ 61
- 0
FPC_4_extender/FPC_4_extender.net Zobrazit soubor

@@ -0,0 +1,61 @@
(export (version D)
(design
(source E:\Users\Benjamin\Documents\tubcloud\Projekte\Waveshare_LCD_HAT\rgb_lcd_hat\FPC_4_extender\FPC_4_extender.sch)
(date "20.02.2021 19:50:37")
(tool "Eeschema (5.1.4)-1")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
(company)
(rev)
(date)
(source FPC_4_extender.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref J1)
(value Conn_01x04)
(footprint Connector_FFC-FPC:TE_84952-4_1x04-1MP_P1.0mm_Horizontal)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_01x04) (description "Generic connector, single row, 01x04, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 60328FBF))
(comp (ref J2)
(value Conn_01x04)
(footprint Connector_FFC-FPC:TE_84952-4_1x04-1MP_P1.0mm_Horizontal)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_01x04) (description "Generic connector, single row, 01x04, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 60329B47)))
(libparts
(libpart (lib Connector_Generic) (part Conn_01x04)
(description "Generic connector, single row, 01x04, script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*_1x??_*))
(fields
(field (name Reference) J)
(field (name Value) Conn_01x04))
(pins
(pin (num 1) (name Pin_1) (type passive))
(pin (num 2) (name Pin_2) (type passive))
(pin (num 3) (name Pin_3) (type passive))
(pin (num 4) (name Pin_4) (type passive)))))
(libraries
(library (logical Connector_Generic)
(uri "D:\\Program Files\\KiCad\\share\\kicad\\library/Connector_Generic.lib")))
(nets
(net (code 1) (name "Net-(J1-Pad4)")
(node (ref J1) (pin 4))
(node (ref J2) (pin 1)))
(net (code 2) (name "Net-(J1-Pad3)")
(node (ref J1) (pin 3))
(node (ref J2) (pin 2)))
(net (code 3) (name "Net-(J1-Pad2)")
(node (ref J1) (pin 2))
(node (ref J2) (pin 3)))
(net (code 4) (name "Net-(J1-Pad1)")
(node (ref J1) (pin 1))
(node (ref J2) (pin 4)))))

+ 248
- 0
FPC_4_extender/FPC_4_extender.pro Zobrazit soubor

@@ -0,0 +1,248 @@
update=20.02.2021 19:51:23
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=FPC_4_extender.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=1
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

+ 46
- 0
FPC_4_extender/FPC_4_extender.sch Zobrazit soubor

@@ -0,0 +1,46 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Connector_Generic:Conn_01x04 J1
U 1 1 60328FBF
P 3600 2600
F 0 "J1" H 3518 2917 50 0000 C CNN
F 1 "Conn_01x04" H 3518 2826 50 0000 C CNN
F 2 "Connector_FFC-FPC:TE_84952-4_1x04-1MP_P1.0mm_Horizontal" H 3600 2600 50 0001 C CNN
F 3 "~" H 3600 2600 50 0001 C CNN
1 3600 2600
-1 0 0 -1
$EndComp
$Comp
L Connector_Generic:Conn_01x04 J2
U 1 1 60329B47
P 4450 2700
F 0 "J2" H 4368 2275 50 0000 C CNN
F 1 "Conn_01x04" H 4368 2366 50 0000 C CNN
F 2 "Connector_FFC-FPC:TE_84952-4_1x04-1MP_P1.0mm_Horizontal" H 4450 2700 50 0001 C CNN
F 3 "~" H 4450 2700 50 0001 C CNN
1 4450 2700
1 0 0 1
$EndComp
Wire Wire Line
3800 2500 4250 2500
Wire Wire Line
4250 2600 3800 2600
Wire Wire Line
3800 2700 4250 2700
Wire Wire Line
4250 2800 3800 2800
$EndSCHEMATC

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