Now the paneling script copies the drc settings from the master
Which is important since ratsnest fills the copperlayers to the
outline according to the drc settings.

Also the Panel now contains two proper copies of the board sides
instead of mirrored copies.

fixes #5
fixes #2

remove on/off markings
add approx. before resistor values

removed switch ON/OFF silk
add slot mill for side seperation
add jlc silk mark for production number
mark values for led resistors as approximative

just in case someone wants the uninterpolated data

These are the most up to date ones and include a printable stl version

The Software used was Fusion360 from autodesk (.f3d-files)